PERUN PROCESSING PLATFORM
Infinity Perun processor is a reconfigurable processing platform for nanosatellites which can be used as an on-board computer as well as a payload processor. Unique FPGA based architecture enables reconfiguring communication interfaces and GPIOs based on system requirements and avoids hardware obsolescence due to changing engineering requirements throughout missions.
- SmartFusion 2 SOC with Cortex M3 Processor
- SEU Immune 256 kB internal e-NVM and 64 kB internal SRAM
- 4 Mbit SEU immune SPI MRAM
- 512 Mbit SPI Flash as reconfiguration memory and general-purpose store
- Latch-up protection on all power supplies
- 20 MHz external oscillator, 32kHz RTC oscillator plus 2 internal clock sources
- On-orbit reprogrammable
- SPI flash memory
- Any combination of UART, SPI, I2C, and other interfaces
- 36 user configurable GPIOs at 3V3
- 34 user configurable GPIOs at 2V5
- Form factor: 55mm x 40mm card with high density interconnect (HDI)
- Space qualified to NASA GEVS standard
- Flight heritage since 202
In-orbit re-programmability of Perun processor enables the ability to rectify hardware/ software faults during missions. Additionally, the feature enables the utilization of different firmware based on mission stages and power requirements.
Perun processor comes with a range of data storage options including SEU tolerant MRAM and Flash memory.
Perun is an evolution of MiniVolkh-2.0 processor which is qualified to NASA GEVS standard and has flight heritage since 2020. In addition to all the features of MiniVolkh-2.0, Perun has greater number of user-configurable GPIOs to further facilitate complex nano-satellite missions.
Perun Processing Platform is made under license from UNSW.